O K A N
U N I V E R S I T Y
FACULTY OF ENGINEERING AND ARCHITECTURE
COUR S E SY LLA BUS
2014/2015 Fall
Course CodeName
EEE459 – Very Large Scale Integrated Circuits (VLSI)
Course Schedule
Course: Tuesday, 13:00 - 15:00 – Room D404
Lab: Tuesday, 15:00 - 17:00 – Room D200
Instructor’s Name Yrd. Doç. Dr. Burak Kelleci
Phone (216) 677-1630 Ext. 1983
E-mail [email protected]
Office Hours
Supplementary
Textbook
Integrated Circuit Design, Neil H. E. Weste, D. M. Harris, ISBN: 978-0-321-69694-6
Digital VLSI Chip Design with Cadence and Synopsys CAD Tools, E. Brunvand, ISBN: 978-1-926-56755-6
CMOS Digital Integrated Circuits Analysis & Design, S. Kang, Y. Leblebici, ISBN: 978-0-072-46053-7
Art of Analog Layout, Alan Hastings, ISBN: 978-0-131-46410-0
Course Outline
(per weeks)
Course Plan
Week 1.
(23 Sep)
Week 2.
(30 Sep)
LAB 1
Week 3.
(7 Oct)
Week 4.
(14 Oct)
LAB 2
Week 5.
(21 Oct)
LAB 3
Week 6.
(28 Oct)
LAB 4
Week 7.
(4 Nov)
LAB 5
Week 8.
(11 Nov)
LAB 6
Week 9.
(18 Nov)
Week 10.
(25 Nov)
LAB 7
Week 11.
(2 Dec)
LAB 8
Week 12.
(9 Dec)
LAB 9
Week 13.
(16 Dec)
LAB 10
Week 14.
(23 Dec)
Midterm Dates
Grading
Introduction to Very Large Scale Integration
Crystal Growth, Operation of Diode, NPN and Mosfet, Fabrication and Layout
Inverter Simulation
Holiday
Schematic entry, Circuit simulation using Spectre, Layout Entry, Post Layout Simulation, Design for
Manufacturing
Inverter Layout
Introduction to PCB Manufacturing, Soldering
Nand Simulation
PCB Schematic entry and Layout
Nand Layout
CMOS Inverter: Static and Dynamic Characteristics
PCB Schematic of an Active Filter
Super Buffer Design
PCB Layout of an Active Filter
Midterm
Combinational MOS Logic Circuits
PCB Schematic and Layout of a Logic Circuit
Sequential MOS Logic Circuits
D-Flip-Flop Simulation
Standard Cell Design Flow
Synthesis of HDL Code
Design for Manufacturability
Place and Route of Synthesized HDL Code
Final Project Presentation
1. Midterm: Week 9 (18-11-2014)
1.
2.
3.
4.
Midterm 20%
Homework 10%
Lab 20%
Final Project50%
Attendance
Course: Regularity of 70% is required.
Additional
Remarks
Course Web Site: http://users.okan.edu.tr/burak.kelleci
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Very Large Scale Integrated Circuits (VLSI)